On October 27, citing media reports, TrendForce stated that due to an explosion in demand for AI and widespread capacity constraints across the semiconductor supply chain, TSMC plans to raise prices for its advanced chip packaging services, with increases of up to 20%.

Regarding CoWoS packaging

According to reports, semiconductor foundries and outsourced semiconductor assembly and test (OSAT) providers—including TSMC—are preparing for a new round of price hikes, with plans to increase quotes for CoWoS (Chip-on-Wafer-on-Substrate) packaging by 10% to 20%. This packaging technology is widely used for high-end AI processors. Demand for CoWoS has expanded beyond graphics processing units (GPUs) to include server central processing units (CPUs) and custom application-specific integrated circuits (ASICs). Meanwhile, the longer testing cycles required for AI chips are further straining the capacity for assembly and testing.

Lead times for chip-manufacturing equipment have also extended, increasing from the previous 3–6 months to 6–8 months. As chipmakers scramble to secure delivery slots, equipment suppliers are struggling to ramp up production quickly. Industry insiders reveal that TSMC's downstream clients no longer have the luxury of negotiating prices; they are placing orders simply based on a commitment to delivery timelines.

Source: This text is compiled from publicly available information, please contact us if you have any questions.

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