Memory market expected to hit $200 billion record for second time in a row by 2025 amid tariff concerns.

HBM leads growth

At the beginning of 2024, the industry ushered in a new round of growth momentum with a surge in demand for AI training workloads in data centers. This marks a strong rebound from the severe cyclical downturn in 2022-2023, which triggered historic operating losses in the DRAM and NAND industries. 

AI-driven demand has triggered explosive growth in the entire memory industry and has driven high-bandwidth memory (HBM) to dominate, far exceeding the overall DRAM market. Global HBM revenue is expected to grow at an astonishing 33% compound annual growth rate between 2024 and 2030, and its share of the DRAM market will reach an unprecedented 50% by 2030.

NAND headwinds and NOR rebounds

The NAND industry continues to face headwinds, weighed down by weaker-than-expected consumer demand and elevated inventory levels across the supply chain. In response to these pressures, leading suppliers have implemented aggressive supply-side adjustments, including reduced fab utilization and multiple production cuts, in an effort to restore market balance and lay the foundation for a more sustainable recovery. Meanwhile, the NOR flash market also experienced a healthy rebound in 2024 (up approximately 15% year-over-year), driven by shipment growth and an improved pricing environment, especially in the consumer segment.

Technological innovation competition

China races to dominate memory production as top memory vendors double down on cutting-edge technology. Competition in the high-capacity memory (HBM) market is intensifying as SK Hynix, Samsung and Micron are all aggressively improving yields and scaling up production in response to expected shortages in 2025. At the same time, China is increasing its efforts to localize memory manufacturing to close the technology gap with global leaders. This strategic move now extends to the PC and consumer electronics sectors, further pressuring the global memory supply and demand landscape.

CMOS bonding, new cell designs and 3D architectures will redefine memory innovation beyond planar scaling. Among the many advanced packaging methods, CMOS bonding has emerged as one of the most promising solutions to achieve higher density, higher performance memory devices. In the 3D NAND space, Yangtze Memory pioneered wafer-to-wafer hybrid bonding with its Xtacking™ architecture, followed by Kioxia and SanDisk in their 218-layer CMOS bonded array (CBA) designs. Samsung and SK Hynix are expected to adopt similar approaches in the upcoming 4xx-layer node, and Samsung has reportedly licensed Yangtze Memory's IP. Looking ahead, future 3D NAND devices may require bonding of three different wafers (logic chip + dual memory array) to achieve scaling beyond 500 layers.

In the DRAM space, planar designs are expected to continue to evolve through the 0c/0d nodes (2033-2034), supported by continued architectural and process innovations. The current industry-standard 6F² DRAM cell is expected to eventually be replaced by a 4F² cell architecture based on vertical transistors (VT) in a CMOS bonded layout. After this, it is widely believed that the transition to 3D DRAM architecture is inevitable. As of 2025, all major DRAM vendors are actively exploring multiple 3D integration paths. Leading concepts include 1T-1C cells with horizontal capacitors, as well as capacitor-free structures such as gain cells (2T0C) and floating-body-based 1T DRAMs. At the same time, semiconductor equipment leaders including Applied Materials, Lam Research, and Tokyo Electron are increasing their investments in advanced tool solutions to address the unique process challenges of 3D DRAM manufacturing.

Source: Content from Yole

Reference link: https://www.yolegroup.com/product/report/status-of-the-memory-industry-2025/?utm_source=PR&utm_medium=email&utm_campaign=PR_Status-of-the-Memory-Industry_June2025

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