TSMC's 3nm generation has officially entered its golden period of mass production. Analysts point out that in the third quarter, 3nm revenue accounted for 23% of total revenue, exceeding the growth rate of 5nm, becoming a key driver of overall operations. With the full expansion of AI and cloud applications, TSMC's 3nm production lines are operating at full speed, and the capacity utilization rate (UTR) of Fab18 in Southern Taiwan Science Park is almost at full capacity, with demand for AI chips and flagship mobile chips continuing to rise.

TSMC 3nm

Industry sources indicate that TSMC's monthly 3nm production capacity has rapidly increased from 100,000 wafers at the end of last year to 100,000-110,000 wafers, and is projected to further reach 160,000 wafers by 2025, representing an increase of nearly 50%. Nvidia has been the biggest driver, adding 35,000 wafer starts per month, leading to tight capacity in advanced processes. Market analysts point out that Nvidia's next-generation Vera Rubin GPU and Rubin Ultra platform both use TSMC's N3P process, which will become the main driver of high-performance computing (HPC) revenue in the next two years. Currently, international CSPs (cloud service providers) are vying to adopt the 3nm process. Next year, in addition to Nvidia using TSMC's 3nm process, AWS's self-developed AI chip, Trainium 3, and Google's self-developed AI accelerator, TPU v7p, will also compete for 3nm capacity.

The bottleneck of advanced packaging CoWoS is relatively not serious. Chip manufacturers point out that the main challenge next year is the supply of 3-nanometer wafers. Some CSP giants continue to compete for more wafer quotas. For example, Google plans to provide Anthropic with millions of TPUs. However, according to the original supply chain information, there is a huge capacity gap, which means that it may squeeze the capacity supply of competitors such as Nvidia.

Speculation of Semiconductor industry

Semiconductor industry insiders speculate that Jensen Huang's multiple visits to Taiwan, demonstrating his strong relationship with TSMC, and his subsequent invitation to the sports meet, lay the groundwork for securing limited advanced process capacity next year. In the Southern Taiwan Science Park's 3nm process, besides the basic N3, there are also improved versions such as N3E and N3P. These derivative nodes are optimized for performance, power consumption, and yield.

Analysts predict that TSMC's 3nm process share will further challenge exceeding 30% next year, with AI/HPC as the main growth driver. In addition to increased production, price elasticity is also rising. It is understood that the supply chain indicates TSMC will raise advanced process prices by 3-5% over the next four years, highlighting the strong demand for AI chips and making the most advanced process wafer foundry a seller's market.

Source: Content from the Commercial Times

Reference link

https://www.ctee.com.tw/news/20251108700086-430501

View more at EASELINK